Design and simulation of Differential Transimpedance Amplifier (TIA) Based on 0.18 µm CMOS Technology-eng

Section: Engineering (Miscellaneous): Civil Engineering

Abstract

AbstractThe transimpedance amplifier is realized in a 0.18m CMOS technology. The TIA uses a shunt-shunt feedback topology, differential TIA because it reaches a higher bandwidth than a conventional one. The TIA also has a variable gain to increase the bandwidth of theamplifier . The TIA has a maximum gain of 73 dB, bandwidth 3.1GHZ, bit rate 5Gb/s and input-referred current noise of 5 pA/Hz. Eyejitter at bit rate 5Gb/s equal to 5ps (peak to peak).Keywords:transimpedance amplifier (TIA) , Berkeley Short Channel Igfet model (BSIM model) , Advanced design system (ADS) .

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How to Cite

[1]
“Design and simulation of Differential Transimpedance Amplifier (TIA) Based on 0.18 µm CMOS Technology-eng”, AREJ, vol. 21, no. 4, pp. 121–131, Aug. 2013, doi: 10.33899/rengj.2013.77383.

How to Cite

[1]
“Design and simulation of Differential Transimpedance Amplifier (TIA) Based on 0.18 µm CMOS Technology-eng”, AREJ, vol. 21, no. 4, pp. 121–131, Aug. 2013, doi: 10.33899/rengj.2013.77383.